The present invention relates to a semiconductor device and the method of producing the same, particularly relates to a production technique of a MIS (Metal Insulator Semiconductor) portion for a semiconductor device, which is used, for example, in an integrated circuit for driving a liquid crystal flat panel display.
Many requirements for such an IC as drives a liquid crystal flat panel display (hereinafter referred to as LCD panel) have been made to improve the display property etc. For example, with the enlargement and coloring of the LCD panel, a high withstand voltage in a drive IC have been required to improve the contrast property. Further, with the increase of the amount of information for the display, a high speed operation in a logic circuit portion have been also required. Also, in addition to the improvement of the operation speed of the logic circuit portion, in order to reduce the production cost, it is required to miniaturize the components for down sizing chips. To maintain the withstand voltage of the MOS (Metal Oxide Semiconductor) transistor circuit of the drive IC at such level that an operation can be made at a driving voltage of several tens voltages or more, a structure having a thick gate insulating film is usually used. As can be found from the drive IC 30 for an LCD panel shown in FIG. 5, the thickness of a gate insulating film 34 of a MOSFET 33 in the side of a high voltage drive circuit 30b formed in an n well 32 of a semiconductor substrate 31 is enlarged to enhance the withstand voltage between a gate electrode 36 and source-drain regions 35. However, even in a case where a low voltage drive circuit (logic circuit portion) 30a is formed in a p well 38 in the surface side of the same semiconductor substrate 31, a gate insulating film 39 of a MOSFET 37 in the side of the low voltage drive circuit 30a is formed at the same time when the gate insulating film 34 in the side of the high voltage drive circuit 30b is formed, from the restriction in the process. Thus, the thickness of the gate insulating film 39 unnecessarily becomes large and the current capacity cannot be obtained so that the operation property is deteriorated. In FIG. 5, the reference numerals 40, 41 and 42 respectively denote an intervening insulating film, a p-type offset diffusion region and a source-drain region in the side of the low voltage drive circuit 30a.
Thus, a structure in which the gate insulating films of the low voltage drive circuit side MOSFET and of the high voltage drive circuit side MOSFET have a different thickness respectively, has been investigated. The structure have been disclosed in Japanese Patent Unexamined Publication Nos. 2-153574 and 2-187063. The semiconductor device with such structure is sometimes referred to as a twin gate insulating film structure. For example, the gate insulating films are produced in separate steps through the following process.
First, as shown in FIG. 4(a), both sides of a low voltage drive circuit portion formation region 51 and a high voltage drive circuit portion formation region 52 are wet-oxidized at a temperature of about 800.degree. C. for about 170 minutes to form a gate oxide film 50 having a thickness of about 840 angstroms. Reference numeral 49 denotes a field oxide film.
Next, as shown in FIG. 4(b), a resist layer 56 having a window for regions containing a gate electrode formation region and a contact formation region in the side of the low voltage drive circuit portion formation region 51 is formed. After that, as shown in FIG. 4(b) with a dotted line 58, an ion implantation to a channel formation region is sometimes carried out to control the threshold voltage in accordance with necessity.
Next, as shown in FIG. 4(c), a wet etching using a HF solution is carried out using the resist layer 56 as a mask to remove the gate oxide film 50 formed on the surface of the low voltage drive circuit portion formation region 51.
Next, as shown in FIG. 4(d), the resist layer 56 is removed.
After that, as shown in FIG. 4(e), a wet oxidation is carried out at a temperature of about 800.degree. C. for about 40 minutes as a second gate oxide film formation process, so that a gate oxide film 55 having a thickness of about 250 angstroms is formed on the surface of the low voltage drive circuit portion formation region 51. This oxidation process additionally oxidizes the gate oxide film 50 in the side of the high voltage circuit portion formation region 52 and the thickness of the gate oxide film 50 becomes about 1000 angstroms. After this step, normal steps such as a step of forming a polycrystalline silicon layer to form a gate electrode at both sides of the low voltage drive circuit portion formation region 51 and have voltage drive circuit portion formation region 52 and a step of forming a gate electrode by an etching, are performed so that MOSFETs are formed in the respective regions.
Therefore, in the semiconductor substrate surface side, the gate oxide film thickness in the MOS portion of the low voltage drive circuit portion is about 250 angstroms. On the other hand the gate oxide film thickness in the MOS portion of the high voltage drive circuit portion is about 1000 angstroms. Thus, both a high speed operation in the low voltage drive circuit portion side and a high withstand voltage in the high voltage drive circuit portion side can be realized.
However, in a method of separately forming each gate insulating film by a conventional production process, after the formation of the gate oxide film 50 by a first gate oxide film formation process, the resist layer 56 is formed on the surface side and the gate oxide film 50 in the low voltage drive circuit portion side is removed. Consequently, a deterioration in the withstand voltage property, which is supposed to be caused by contamination of the gate oxide film 50 due to the resist layer, disadvantageously occurs. For example, the deterioration in the withstand voltage to 2 Mv/cm to 6 Mv/cm occur. Further, the TDDB property (aging breakage in the oxide film) showing the aging stability of the gate oxide film 50 is also low and the reliability is low.